1- For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] A[i-j];

1- For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] A[i-j];

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Similar questions

6. Update memory values for the following code. Keep track of the loop counter (R16) and index register values as you go through the loop. LDI R16,3 R15, Y+ -Z, R15 LOOP: LD ST DEC R16 BRNE LOOP STS 0x0200, R28 CPU Register R28 (YLB) R29 (YB) R30 (ZUB) R31 (ZHB) Value OxFC 0x01 0x04 0x02 Data Memory Value 0x21 0x02 0x11 0x03 Address 0x01FC 0x01FD 0x01FE Ox01FF Ox0200 0x0201 Ox0202 Ox0203
13. What is the addressing mode used with the second operand in the following instruction: ADD AH, [0300]? M Stack Immediate Register indirect Direct Register Indirect
Part 1: Preliminary Summarize the difference between binary machine language, assembly language, and high-level source files like C. Contrast the difference between a compiler, assembler, and linker What is the difference between the data segment and the text segment of in an assembly language program? What register is used as the stack pointer? What is a ebreak instruction in the sample program? How would you define a constant named 'BLUE' and assign it to the value OX00F in assembly language? Describe how to implement the psuedo-instruction li t1, e using a native instruction.
1. Given the following C code: short ARR [50]; // short is 2 bytes for (short i = 1; i<= 50; i++) ARR [i] = i * i; Convert this code into assembly. Write two versions of the code by using two different addressing modes.
*ASSEMBLY LANGUAGE* A subtraction instruction takes two operands, subtracts the first from the second, and the result goes into the second. Write a 16-bit subtraction instruction, where... The first operand is stored at the memory address contained within the %edx register. (NOTE: To be clear, the %edx register contains the memory address OF the operand, not the operand itself! Recall the syntax of "indirect addressing," to use here.) The second operand -- also where the result shall be stored -- is stored directly in the 16-bit %bp register.
Q) Write the addressing mode that used with the following instructions? 1- MOV CX, [2F0A#] 2- MOV CX, [BX] 3- MOV CX, [SI + 20FAH].10H 4- MOV CX, [BX+ 20FA#].10H 5- OUT DX, AX
What is the MIPS machine language code for the following instruction? Write opcode, rs, rt, rd, shamt, and funct in decimal if it is of R-type, write opcode, rs, rt, offset/const/address in decimal if it is of l-type, and write opcode and const/address in decimal if it is of J-type. In the answer fields below, if any field is not used, enter exactly as written here inside of the quotes "N/A". bne $13, Szero, label where label = 0x1000 and PC = Ox1012 opcode (in decimal) = rs (in decimal) = rt (in decimal) = rd (in decimal) = shamt (in decimal) = funct (in decimal) = offset/const/address/immediate (in decimal) =
Question 1 Consider two C++ int arrays A and B. The base address of A is held by $=0, and B $s1. Variable i A Bx Y Variable i is an index into A. Assume i is never out of Register $to $s0 $s1 $s2 $=3 index bound. Variable x and y are C++ int variables. Write the instructions corresponding to the C+ code block below. Each task is independent. i. BI 6 1 = AL 11 1 + BI 3 1; * Sti = Al 11 1 1 2 3 * St3 = Al 11 ] + BI 3 1 co
Please written by computer source
Example: content of memory at address 3AF is 632Eu. The content of memory at address 32E# is 849FH- a. What is the instruction that will be fetched and execute. b. Show the binary operation that will be performed in AC when the instruction is executed. c. Give the contents of registers PC, AR, DR, AC, and IR at the end of instruction cycle.
L
After the instruction Idr ro, [r1] is executed, what is the content of ro? O A. The 8-bit value located at the memory address stored in r1 B. The memory address where r1 is stored O C. The 32-bit value located at the memory address stored in r1 O D. A copy of r1