10.1.3 Practice Questions

Need a solufor number 2

Modify the Laser Circuit FSM to output x for 25 ns, assuming Tclk = 5 ns. Draw the new State Diagram. How many states have the new State Diagram? Write VHDL code showing separate “blocks” for the next state decoder, memory, and output decoder. Add an Asynchronous Reset active Low.

Write VHDL code for an n-bits register (n can be 4, 8, 16, …) with the Synchronous Reset Active High, and Load Input Active High.

Q3. b) Suppose you want to transmit the 10-bit message [101101101] by Pulse code Modulation (PCM). Using clearly labeled diagrams, show the encoding the bit sequence using the following PCM waveform types: i) Bipolar RZ Signal ii) RZ-AMI iii) Bi – o - L iv) Delay modulation

Write VHDL code for an n-bits register (n can be 4, 8, 16, …) with the Synchronous Reset Active Low, and Load Input Active Low.

TRUE OR FALSE: More than one output of a BCD-to-7 segment decoder/driver can be active at one time.

Assume the baud rate equals bits per second. How long is a bit for a 9600 baud modem? A) 9600 B) 104 us C) 1.04 ns D) 9.6 ns

Q6: Sectoring is a way to do what? a. Achieve branch circuits. b. Put each phone call in a different time slot. c. Do SS7 look-ahead call placement. d. Partition Voice mail boxes e. It is an ISDN-PRI way of brining in trunks f. Achieve frequency reuse. g. None of the above

Q.4: Choose the right answer for the following: 2. What is the duration of bus cycle in 8086 MPU if the clock is 20 MHz and two wait states are inserted? a- 50 nsec b-200nsec c-250nsec d- 300nsec 3. If READY pin is grounded, it will introduce -----state into the bus cycle of the 8086 MP. c- wait a- high 4. The 74ALS138 has total of ---- outputs. a- four b- 16 c- ten d-8 5. When A0-0, it makes the address an - b- no d- low address. a- I/O b- even c- odd d- extra 6. If the oscillation frequency of 8284A clock generator is 24 MHz, the clock signal frequency is----- a-4 MHz b- 20 MHz c-8 MHz d- 6 MHz 7. If the oscillation frequency of 8284A clock gererator is 24 MHz, the peripheral frequency is------ a-4 MHz b- 20 MHz c- 8 MHz d- 6 MHz 8. In fully buffered 8086 microprocessor, its address p ns are already buffered by... a- two 74LS373 address latches b- hree 74LS245 address latches c- three 74LS373 address latches 9. The RES input to the 8284A is placed at logic -- lev l in order to reset…

Draw the circuit diagrams by hand when answering.