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ECE 482 Problem Set #3 Due: Wednesday, September 15 Fall Semester 2021 Professor E. Rosenbaum Reading Assignment: Sections 5.1-5.3, 5.5. 1.(a) A 250-nm CMOS inverter was designed with L n = L p = L min = 240 nm and W n = 3∙L min . Using manual analysis, calculate V M for W p values of 3∙L min , 6∙L min , and 18∙L min . Model parameters are found in Table 3-2, and you are given that V DD = 2.5 V. (b) Use manual analysis to find the value of W p that yields V M = 1.05 V. I.e., you are to design the inverter for V M = 1.05 V. (c) Use HSPICE DC analysis to plot the VTC of the 4 inverters studied in parts (a) and (b). Compare the simulated values of V M with those obtained from manual analysis. (d) Based on the results of parts (a)-(c), formulate a conclusion about the sensitivity of V M to the ratio W p /W n . (e) In parts (e)-(i), you will consider the inverter with W p = 6 ∙ L min and with a 15 fF capacitor connected at its output. If the input to the inverter is switching at a frequency of 133 MHz, what is the dynamic power consumption? If the input is held constant at logic-high (V in = 2.5 V), what is the (static) power consumption? Provide numeric values based on manual analysis. (f) Delay may be estimated using the formulas 𝑡𝑡 𝑝𝑝𝑝𝑝𝑝𝑝 = 0 . 5𝐶𝐶 𝐿𝐿 𝑉𝑉 𝐷𝐷𝐷𝐷 𝑊𝑊 𝑛𝑛 𝐿𝐿 𝐼𝐼 𝐷𝐷𝐷𝐷𝐷𝐷𝐷𝐷 , 𝑛𝑛 and 𝑡𝑡 𝑝𝑝𝑝𝑝𝑝𝑝 = 0 . 5𝐶𝐶 𝐿𝐿 𝑉𝑉 𝐷𝐷𝐷𝐷 𝑊𝑊 𝑝𝑝 𝐿𝐿 �𝐼𝐼 𝐷𝐷𝐷𝐷𝐷𝐷𝐷𝐷 , 𝑝𝑝 � . Using manual analysis, find the values t pHL , t pLH and t p . (I DSAT denotes the drain current of a transistor with W/L = 1, |V GS | = V DD and V min = V DSAT .) (g) Use HSPICE transient analysis to find the values t pHL , t pLH and t p . The input to the inverter should be a 133 MHz square wave with t rise and t fall of 100 ps. (h) Using HSPICE, determine the inverter’s static and dynamic power consumption. Dynamic power is to be found given the same input waveform as for part (g). Hint: Static power is obtained from DC analysis; use the simulated supply current, i(VDD), at Vin=V OL and Vin=V OH, to calculate average static power. Total power is obtained from the same transient simulation that you use to find t p . You may include the following line in your HSPICE deck: .meas tran avg_pwr avg p(vSupply) from=<time> to=<time> . Dynamic power is the difference between total power and static power. If you find that the dynamic power and the total power are nearly equal, explain why. (i) Were the power and delay values obtained from manual analysis close to those found using the more accurate numerical analysis? 2. In this problem, you will explore the limitations of the “unified” I-V model. Specifically, you will extract the parameters for the unified MOS model of an N-channel device fabricated in a 180-nm technology. The device has dimensions L = L min = 180 nm and W = 810 nm. V DD = 1.8 V. You may assume that the DC I-V obtained from HSPICE closely resembles the real measurement data. To obtain the simulated I-V, include the line .lib ‘/class/ece482/models18’ MOS at the top of your HSPICE netlist.

(a) Use HSPICE to plot I D vs. V GS , with V DS set to 50 mV and V SB = 0. V GS should be ramped from 0 to V DD with a 20 mV step size. Use a linear current scale for plotting. Draw a tangent at the steepest part of the curve and the x-intercept will be V T0 . Extract k’ from the slope of that tangent. (b) Plot I D vs. V DS , with V GS = V DD and V SB = 0. V DS should be ramped from 0 to V DD with a 20 mV step size. Use a linear current scale. Extract the parameter λ from the slope of the curve in the vicinity of the point V DS = V DD . (c) Numerically differentiate the data obtained in part (b). Plot the second derivative of I D as a function of V DS . One of the plot maxima (local maximum) is located at V DS = V DSAT . Find the value of V DSAT . (d) Denote I D (V DS =V DD , V GS =V DD , V SB =0) as I Dmax . Using the previously extracted values of V T0 and λ, extract the value of k’ from I Dmax . The magnitude of this k’ should be smaller than what you found in part (a) because mobility is a decreasing function of V GS ; this effect is not captured by the “unified model” but is captured by the transistor model you are using for circuit simulation. How different are the two values of k’? In subsequent parts of this problem, you should use the k’ value from part (d). (e) Set V GS = V DD and V DS = V DD , and ramp V SB from 0 to 1.8 V with a 50 mV step size. Plot I D vs. sqrt(|V SB - 2Φ f |). Extract the value of γ from the slope of the curve. You are given - 2Φ f = 0.8 V. (f) Plot the I-V curve of the NMOS device as predicted by the unified model. Set V SB = 0; let V DS vary from 0 to V DD with a 50 mV step size; let V GS vary from 0 to V DD with a 0.3 V step size. Use the parameters you obtained in the previous parts of this problem. (g) Use HSPICE to generate the I-V curves described in part (f). Compare the HSPICE simulated I-V with that obtained using the unified model. Comment upon the results of this comparison. (h) Compare the results of this problem with the results shown in Figure 3-25. Does the simple model fit 180 nm I-V data as well as it fits 250-nm I-V data, or is the fit worse? You are likely to find that the fit of the simple model to the real I-V data becomes worse as technology scaling proceeds because the physical effects not captured by the model become more pronounced as one moves to a more advanced technology node. However, another reason you may not obtain good agreement between the simple model and the HSPICE results is that you will have extracted the model parameters “locally,” i.e., each parameter was extracted using only a small part of the I-V curve. “Global optimization” can be used to obtain a parameter set that provides a better (but still not great) fit to the real I-V curves. After you complete this homework, the course staff will provide you with an optimized parameter set for 180-nm technology. You will use the optimized parameter set for subsequent homework assignments.

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