EE234_hw3_sol_24S

Q3/(A) False OR True 1- A0-0 and BHE-1 are used as low bank-select signal: 2-AX is 2234 H after executing the following instruction: AAS. If AX-2234H. 3-IP register holds the offset address of the next instruction to be executed. 4- The XLAT instruction in 8086 assembly language is used to perform arithmetic operations between two memory operands. 5- Bus interface unit is responsible form

A reset input is used in IC 7493, why? a. For reset the counter       b. For setting the counter       c. For decrement of bit by 1       d. For increment of bit by 1

The numbers from 0-9 and a no characters is the Basic 1 digit seven segment display * .can show False True In a (CA) method of 7 segments, the anodes of all the LED segments are * "connected to the logic "O False True Some times may run out of pins on your Arduino board and need to not extend it * .with shift registers True False

24. a. The serial adder required six clock pulses to add two, three bit binary numbers. (True or False. Write the correct one, if it's false) b. A three bit parallel adder circuit uses three adders to add all bits on two clock pulse. (True or False. write the correct one, if it's false) c. What is the two's complement of 1001?

Design and draw a 3 bit Gray code synchronous counter with the state diagram shown below [14 marks] State diagram for a 3-bit Gray code counter

need handwritten with explanation Clear

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1.Using the byte rotation scheme described for the ARM7TDMI, calculate the instruction and rotation needed to load the following constants into register r2: a)0x00007800     b)0x001C0000

The need to use forward error control is to

Write a Verilog code with testbench for 16-bit up/down counter with synchronous reset and synchronous up/down.If up/down is set the counter is up counter and if it is not set, the counter is a down counter.     submit the module code, testbench code, and the simulation results. PLEASE EXECUTE CODE IN VERILOG

1-With most monostable multivibrators, what is the Q output when no input trigger has 2- The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out Q5A: - Choose the correct answer for each question occurrèd? A. LOW, B. +5V, C. SET, D.HIGH shift register that is initially clear. What are the O outputs after four clock pulses? A. 10011100 В. 11000000 C. 00001100 D. 11110000 S-11 an 8-bit ring counter has an initial state 10111110, what is the state after the fourth clock pulse? A. 11101011 В. 00010111 С. 11110000 D. 00000000 4- A 555 timer in monostable application mode can be used for A. Pulse position modulation B. Frequency shift keying C. Speed control and measurement. D. Digital phase detector.

RISC processors use ___________, unlike Intel processors. A) Checksum B) Peripheral I/O C) Interrupts D) Memory-mapped I/O

pls solve the 1st 3 parts only. Thnak you

1. An 8-bit register contains the number 10000110. The serial number 11011011is applied to the input. After 5 shift pulses, what is the number in the shift register? Assume shift right operation 2. A binary number is shifted 5 positions to the left. The number therefore has been 3. A binary number must be divided by 128. How many positions must the number be shifted (and in what direction to achieve this?

A 9-bit asynchronous counter has a 128-kHz clock signal applied. (1) What is the MOD number of this counter? MOD number = (ii) What will be the frequency at the MSB output? fmsb = (iii) Assume that the counter starts at zero. What will be the count after 635 input pulses? After 635 input pulse, Count =

8:37 4 A M Vo) Gt LTE1 You Just now i) Analyse and execute the following 8051 Instructions and specify the output and explain the contents of the registers with comments MOV A, #92H SWAP A In the absence of a SWAP instruction, how would you exchange the nibbles? Write an 8051 ALP to show the process ii) Analyse and execute the following 8051 Instructions and specify the output and explain the contents of the registers with comments. CLRC MOV A, #4FH SUBB A#6DH JNC NXT CPL A INC A NXT: MOV RI,A ADD A,RI

1. What is the modulo of the circuit below? 2. Make a table of the count sequence. 3. A BCD counter can assume____discrete state. 4. A BCD counter can divide its input frequency by____. 5. A four-bit binary counter contains the number 0100. Nine inpulse occur. The new counter state is_____. 6. Design a 4-bit down counter.

1. Using the byte rotation scheme described for the ARM7TDMI, calculate the instruction and rotation needed to load the following constants into register r2: a) 0xC3300000     b) 0xFFFFFF44

理 QA Qs Je Qe Qc JA QA le Qc 5 Volts KAQA KeQc Clock Figure (23): Example (14) Synchronous Counter. Synchronous Counter Design Modification H.W.: Design a MOD-5, 3-bit synchronous counter to count in the following sequence: 2, 3, 5, 1, 7. To modify the design and minimize the additional gates required for the J andK inputs, route the unused states to their next natural count state. In other words, route 0 to 1, 4 to 5, and 6 to 7. 2. A synchronous counter of n flip-flop stages always has a modulus of 2". A synchronous counter must count binary numbers in sequence, either up or REDMI NOTE 9 PRO ACQUAD CAMERA Section Self-Test 1. A synchronous counter has a common clock input to all flip-flop stages rof the questions).

Determine the total time required to serially transfer the eight bits contained in waveform A of Figure the first to be transferred. The 1 MHz clock is used as reference. and indicate the sequence of bits. The left-most bit is Clock A

H.W :- 1) A four logic-signal A,B,C,D are being used to represent a 4-bit binary number with A as the LSB and D as the MSB. The binary inputs are fed to a logic circuit that produces a logic 1 (HIGH) output only when the binary number is greater than 01102-610. Design this circuit. 2) repeat problem 1 for the output will be 0 (LOW) when the binary input is less than 01112-710- Saleem Lateef

DRAM uses a _______ to store a bit in each cell. A.transistor B.diode C.capacitor D.flip-flop

Write the Verilog code for an 8-to-1 multiplexer using the if-else statement