Lab 2 Manual

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LABORATORY MANUAL Electronic Devices ENGG*3450 Fall semester 2023 Instructor: Dr. Stefano Gregori Laboratory 2 1 Information 1.1 Purpose The purpose of this laboratory is to study metal-oxide-semiconductor field-effect transistors (MOSFETs). In this laboratory we will examine the MOSFET’s characteristics, regions of operation, biasing conditions, and circuit applications. 1.2 Equipment Equipment Count DC power supply, Keysight EDU36311A 1 Function generator, Keysight EDU33212A 20 MHz 1 Oscilloscope, Tektronix MSO 2024B 1 Multimeter, Amprobe 37XR-A 1 Solderless breadboard and wire kit 1 2 Components Part Count 2 kΩ resistor 1 6.8 kΩ resistor 1 15 kΩ resistor 1 100 kΩ resistor 1 180 kΩ resistor 1 220 kΩ resistor 1 330 kΩ resistor 1 1 F capacitor 1 10 F capacitor 1 CD4007 PDIP chip 1 3 Pre-laboratory theory 3.1 Operation of the MOSFET MOSFETs are n-channel (NMOS) or p-channel (PMOS), and they have four-terminals, with gate terminal (G), source terminal (S), drain terminal (D), and body terminal (B). The gate terminal controls the current flow from the drain to the source. In most cases, the body 1

terminal is connected to the source terminal, or to the lowest available voltage for NMOS transistors and to the highest voltage in PMOS transistors. In an NMOS transistor, when the voltage applied to the gate is zero or below a given threshold ( v GS ≤ V tn ), the path between the drain and source has a high resistance and the drain current ( i D ) is zero. This is the cutoff region (i.e. the transistor is off). When a positive voltage larger than the threshold is applied to the gate terminal ( v GS > V tn ), electrons start to gather under the gate forming a channel connecting the drain and the source. When we apply a voltage across the drain and source terminals ( v DS > 0 V), a current i D starts to flow through the channel from drain to source. The channel acts as a resistance controlled by the voltage v GS and the MOSFET is in triode region (also called linear region). The drain current is given by i D = k n ( v GS − V tn ) v DS − v 2 DS 2 , (1) where v GS is the gate-to-source voltage, v DS is the drain-to-source voltage, V tn is the threshold voltage, and k n = µ n C ox W L is the transistor transconductance parameter. The transistor on resistance can be approximated by R on = 1 k n ( v GS − V tn ) . (2) When v DS exceeds the overdrive v GS − V tn , the channel is pinched-off, and the current does not increase anymore with v DS . The MOSFET is in saturation region, and the drain current is given by i D = k n 2 ( v GS − V tn ) 2 (1 + λ n V DS ) , (3) where λ n is the channel-length modulation coefficient. For the NMOS transistor, Fig. 1(a) shows the i D - v DS characteristics illustrating the cutoff, triode, and saturation regions at different values of v GS . Fig. 1(b) shows the i D - v GS characteristic for a given v DS . The characteristics of the PMOS transistor are given by analogous equations in which v GS is replaced by v SG , v DS by v SD , k n by k p , V tn by | V tp | , and λ n by | λ p | . Figs. 1(c) and 1(d) show the corresponding plots. 3.2 Common-source amplifier When MOSFETs are used in the design of amplifiers, they have to be biased in saturation region, where v GS − V tn < v DS (NMOS) or v SG −| V tp | < v SD (PMOS). In the common-source amplifier based on NMOS transistor in Fig. 2(a) , the input voltage v I = V I + v i is applied between gate and source and it is the sum of two components: a constant bias voltage V I , and a small variable voltage v i (e.g. a sinusoidal waveform). Likewise, the output voltage v O = V O + v o and the drain current i D = I D + i d are the sum of a constant bias component and small variable component. When V I ≤ V tn , the transistor is in cutoff region, I D = 0 A, and V O = V DD . When V I is increased above V tn , the transistor turns on in saturation region, I D = k n 2 ( V I − V tn ) 2 , (4) 2

� � � � � � �� ( � ) � � � � � � � ( �� ) (a) NMOS i D - v DS . � � � � � � �� ( � ) � � � � � � � ( �� ) (b) NMOS i D - v GS . � � � � � � �� ( � ) � � � � � � � ( �� ) (c) PMOS i D - v SD . � � � � � � �� ( � ) � � � � � � � ( �� ) (d) PMOS i D - v SG . Figure 1: Ideal transistor characteristics with nominal values. v I R MN V DD v O (a) NMOS. V DD R MP v I v O (b) PMOS. Figure 2: Common-source amplifiers. 3

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and V O = V DD − R I D = V DD − R k n 2 ( V I − V tn ) 2 . (5) If V I is increased further, V O decreases, and eventually the transistor enters triode region when V I > V tn + √ 2 k n V DD + 1 − 1 k n R . (6) Under this condition, I D = k n ( V I − V tn ) V O − V 2 O 2 , (7) and V O = V DD − R I D = V DD − R k n ( V I − V tn ) V O − V 2 O 2 . (8) We can calculate the gain of the amplifier with transistor in saturation region by taking the differential of ( 5 ) v o = d d v I V DD − R k n 2 ( V I − V tn ) 2 v I = V I · v i = − R k n ( V I − V tn ) v i = − R g m v i , (9) where g m = k n ( V I − V tn ) is the MOSFET’s transconductance. The voltage gain is then A v = v o v i = − g m R. (10) The calculations for the the common-source amplifier based on PMOS transistor in Fig. 2(b) are analogous. 4 Experiments You will examine the characteristics of the transistors in the CD4007 chip. The CD4007 chip has three NMOS transistors and three PMOS transistors included in a 14-pin dual in-line (DIL) package. When looking at the package with the identifying notch at the top, pin 1 is on the top left corner, and the other leads are numbered consecutively from pin 1 counter- clockwise. Fig. 3 shows the top view of the chip, and Fig. 4 shows the functional diagram of the CD4007 chip. 4.1 Experiment 1—MOSFET I-V characteristics In this experiment, you will examine the i D - v DS and the i D - v GS characteristics of the NMOS transistor. 4.1.1 Preparation Prepare these components: CD4007 chip [ 2 ] and R = 2 kΩ. Using the digital multimeter, measure the resistance and write down the exact value that you measured. Use transistors N1 (pins 6, 7, and 8) and P1 (pins 6, 13, and 14) in this experiment. 4

1 V SS 2 3 4 5 6 7 14 13 12 11 10 9 8 V DD V DD P2 N2 P1 V DD V SS P3 N3 N1 V SS V DD V SS Figure 3: Top view of the CD4007 chip [ 2 ]. N1 P1 6 8 13 N2 P2 3 5 1 N3 P3 10 12 14 2 11 7 4 9 Figure 4: Functional diagram of the CD4007 chip [ 2 ]. 5

v GS V DD R v D N1 v G v S i D V (a) i D - v GS . v GS V DD R v D N1 v G v S i D V (b) i D - v DS . Figure 5: Circuits for measuring the I-V characteristics of the NMOS transistor. 4.1.2 Procedure Measure R and set the supply voltages. 1. Measure the resistance R using the multimeter. 2. Construct the circuit shown in Fig. 5(a) on the breadboard. Set one channel of the dc power supply to generate V DD = 12 V. Caution: connect pin 7 ( V SS ) to ground. 3. Use the other channel of the dc power supply to generate v G and set it to 0 V. Measure the i D - v GS curve of the NMOS transistor. 1. Set the multimeter as voltmeter. Measure the exact value of the V DD by connecting the negative probe (black) to ground and the positive probe (red) to the V DD . 2. Measure the voltage drop v GS as shown in Fig. 5(a) by connecting the negative probe (black) to the source terminal of the transistor (ground), which is pin 7, and the positive probe (red) to the gate terminal of the transistor, which is pin 6, to measure v GS . 3. Keep the negative probe connected to the source terminal of the transistor (ground), disconnect the positive probe from the gate terminal and connect it to the drain ter- minal, which is pin 8, to measure v DS . 4. For a total of 16 voltage steps of v GS (from 0 V to 6 V), construct a table that consists of 16 rows and 3 columns including the measurements of v GS , v DS , and the calculation of i D using i D = ( V DD − v DS ) /R with the measured value of R . 5. Plot the i D - v GS curve and find the approximate threshold voltage V tn by choosing proper collected data to linearize the characteristic, and verify it by the formulas discussed in the previous section. Measure the i D - v DS curve of the NMOS transistor. 1. Use the circuit shown in Fig. 5(b) on the breadboard. Set the dc power supplies to generate v G = 4 V and V DD = 12 V and measure the exact values. 6

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v SG V DD P1 v G V R i D v S v D (a) i D - v SG . P1 v S v D R i D V DD V v SG v G (b) i D - v SD . Figure 6: Circuits for measuring the I-V characteristics of the PMOS transistor. 2. Set the multimeter as voltmeter to measure the voltage drop across V DD as shown in Fig. 5(b) by connecting the negative probe (black) to the source terminal of the transistor (ground) and the positive probe (red) to V DD . 3. Keep the negative probe connected to the source terminal of the transistor (ground), disconnect the positive probe from V DD , and connect it to the drain of the transistor to measure v DS . 4. Sweep V DD from 0 to 12 V (total of 16 voltage steps), create a table that includes the measurements of V DD , v DS , and i D . 5. Plot the i D - v DS curve for v GS = 3 V. Calculate the NMOS transconductance parameter k n = µ n C ox W/L using the plot (considering the current in the saturation region) and equation ( 3 ). 6. Calculate channel-length modulation coefficient. 7. Repeat steps 1 to 6 with v G = 6 V. 4.1.3 Optional steps If you have finished the mandatory experiments and you still have time, using the same procedure that you followed for the NMOS, you can measure the i D - v SG curve of the PMOS transistor by constructing the circuit in Fig. 6(a) and by setting V DD = 12 V and v G from 6 V to 12 V in 16 steps. Plot the i D - v SG curve and find the approximate threshold voltage V tp using the data. Finally, using the same procedure that you followed for the NMOS, measure the i D - v SD curve of the PMOS transistor by constructing the circuit in Fig. 6(b) and by setting v SG at 3 V and 6 V, and V DD from 0 V to 12 V in 16 steps (adjust v G as you change V DD so that v SG is constant). Plot the i D - v SD curve and calculate the PMOS transconductance parameter k p = µ p C ox W/L using the data. Discuss the differences between NMOS and PMOS transistors. 4.2 Experiment 2—Common-source amplifier In this experiment, you will test the operation of common-source amplifiers and measure the voltage gain. 7

v I R v O N1 V DD R 1 R 2 C 1 (a) NMOS. v I V DD R 1 R 2 C 1 R P1 v O (b) PMOS. Figure 7: Common-source amplifier circuits. 4.2.1 Preparation Prepare these components to carry out the experiment: CD4007 chip [ 2 ], R = 6.8 kΩ, R 1 = 330 kΩ, R 2 = 100 kΩ, and C 1 = 10 µ F. Turn on the oscilloscope and test both probes following the steps on the laboratory manual about components and instruments. Connect the function generator to channel one on the oscilloscope to produce a 200 mV peak-to-peak sine wave at 0.5 kHz. Use transistors N1 (pins 6, 7, and 8) and P1 (pins 6, 13, and 14). 4.2.2 Procedure Characterize the common-source amplifier based on the NMOS transistor. 1. Build the circuit shown in Fig. 7(a) on the breadboard. Connect the dc power supply to generate V DD = 10 V. Measure V DD and the constant bias value of the transistor gate voltage. Connect the function generator set previously. 2. Connect channel 1 of the oscilloscope to v I and channel 2 to v O . 3. Capture the observed oscilloscope’s waveforms. 4. Calculate the voltage gain of the amplifier from the waveforms (magnitude and sign). 5. Estimate the value of g m for the NMOS transistor based on the data collected in experiment 1 and the equations in section 3.2 with the appropriate values of k n , V I (bias value of the transistor gate voltage) and V tn . 6. Calculate the approximate value of g m using equation ( 10 ) and the voltage gain mea- sured with the oscilloscope. Is the value consistent with the result of the previous step? Take a screenshot following the steps on the laboratory manual about components and instruments. 7. Calculate the maximum amplitude of the input signal which the amplifier does not generate any distortion at its output. Verify your calculation by taking a proper screenshot of the output voltage. 8

v I v O N1 V DD R 1 R 2 C 1 P1 (a) Sine input. v I v O N1 V DD P1 C 2 (b) Square wave input. Figure 8: Inverter. 8. For the same configuration change the frequency to 5 kHz, 50 kHz, 500 kHz, and 5 MHz. 9. Capture the observed oscilloscope’s waveforms at the four frequencies. 10. Describe the effect of changing frequency on the gain and the reason it happens. 4.2.3 Optional steps If you have finished the mandatory experiments and you still have time, characterize the common-source amplifier based on the PMOS transistor by constructing the circuit in Fig. 7(b) and following the same procedure done for the NMOS. Discuss the differences between two common-source amplifier circuits. Inverter : Prepare these components to carry out the experiment: CD4007 chip, R 1 = 220 kΩ, R 2 = 195 kΩ (you can use a 180 kΩ and a 15 kΩ), C 1 = 10 F, C 2 = 1 F, and set the power supply to V DD = 5 V. Build the circuit in Fig. 8(a) and measure the voltage gain using the oscilloscope when the signal generator inputs a 20 mV peak-to- peak sine wave at 5 kHz. Discuss what are the differences in terms of gain and output swing between this circuit and the circuit in Fig. 7(a) and what are the advantages and disadvantages of this configuration. Modify the circuit to the one in Fig. 8(b) , and measure the rise and fall time of the output when the signal generator inputs a 0-to-5-V square waveform at 5 kHz. . 5 Things to remember The MOSFET is a voltage-controlled device, where the controlling gate terminal is insulated from the channel between the drain and source terminals. The MOSFET has three regions of operation (cut-off, triode, and saturation) described by different non-linear characteristics. The two types of MOSFETs, n-channel and p-channel, have complementary features. A key step in the design of transistor amplifiers is to bias the transistor to operate at an appropriate point in the saturation region. 9

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6 Writing the laboratory report 6.1 Report format In a concise and professional manner please provide answers to the experiment questions. The report must include the following items: A cover page titled “Laboratory 2 Report” with a colour picture of the circuit built in experiment 2 (with a resolution of at least 1280 × 720 pixels). This page should also report the course and instructor names, the laboratory session number, date and time, as well as your name and student identification number. About two pages for each experiment documenting your activity with the appropriate measurement conditions, measurements and graphs (four pages total). A final page with your interpretations, observations, and comments on the results. You should include at least a paragraph for each experiment describing what you should remember from the activity that you have completed. Please include a clear schematic for each circuit that you have built, labelled with com- ponent values, types and other pertinent information. Label carefully all the graphs and use the correct units of measurement. Make sure that the graphs are clearly visible, including the scales and titles of the axes. This is needed for anyone to be able to interpret what you have done (including the grader, your colleagues, and yourself at a later time). The guidelines to prepare your report are the following: The maximum number of pages allowed is six, the required file format is PDF , and the maximum file size is 2 MB. The file name must be lab2[your last name].pdf , where your last name is your last name (e.g. lab2gregori.pdf ). Use white paper, letter format (21.6 cm × 27.9 cm), portrait orientation, single column, margins at 2 cm minimum all around. The text must be in black ink, single-spaced (no more than six lines per inch), in a font not smaller than Times New Roman regular 12 pts. Each page, figure, and table must be numbered; number each page at the top right corner outside the set margins; each figure and table must have a title or a caption. Each numeric value must be expressed with the correct unit of measurement. All graphs must be clearly visible, and must include clearly readable scales, axis titles and legends. Capture screenshots from the oscilloscope with the bench-top computer (using Tek- tronix OpenChoice Desktop) or a USB drive. Screenshots that do not include the date and time, and photos of the oscilloscope screen will not be marked. Two marks will be deducted if your submission does not meet the format and the guidelines above. 10

6.2 Timeline The report is intended to be submitted within a week from completing your activity in the laboratory. You are asked to submit your report in pdf format using the dropbox Lab 2 report on the course webpage. The deadline is Friday, 10 November 2023 at 23:59. Submissions that do not meet the deadline or that are not submitted via the dropbox will not be marked and will receive a grade of zero. Please verify that the uploaded file can be opened and is the one you intended to submit, and keep a back-up copy of your report. 6.3 Evaluation criteria The following aspects will be considered: Proper experiment set up and use of the tools. Precise data collection and correct answers. Correct interpretation of the results and relevant observations. Quality of the report (clarity, accurate documentation of the results, appropriate la- belling, use of the units of measurement). Conciseness, complying with the report guidelines, and meeting the deadline. 6.4 Plagiarism Your report must be the result of your own independent work, collected data, and self- expression. You may discuss about components, tools, methods, and requirements, and ask questions to the instructor, teaching assistants, and laboratory technician. However, you are responsible for your own laboratory activity and the report must be written by you alone. No exchange of text, data, graphs, and other material related to the laboratory activity is allowed between students. Please remember that copying text, data, or figures is plagiarism, even if you received the material from a friend, if you found the material on the Internet (including learning apps, answer-sharing platforms and AI chatbots), or if you are reusing material that you have previously submitted elsewhere. Letting other students use your work, completing work for other students, engaging in contract cheating or making answers available to others are also not allowed. Therefore, please keep your reports, files, figures, and measurement data in a secure location. If you are in any doubt as to whether an action on your part could be construed as an academic offence, you are encouraged to consult with the instructor before submitting your report. The instructor will follow up on academic misconduct concerns as per University policy and out of respect to all the students who are maintaining their academic integrity. Electronic means of detection, including Turnitin, will be used to identify possible pla- giarism, unauthorized collaboration or copying as part of the ongoing efforts to maintain academic integrity at the University of Guelph. All submitted assignments will be included as source documents in the Turnitin.com reference database solely for the purpose of detect- ing plagiarism of such papers. The use of the Turnitin.com service is subject to the Usage Policy posted on the Turnitin.com site. 11

7 Acknowledgements Contributions of laboratory technician and teaching assistants are gratefully acknowledged. References [1] A. S. Sedra, K. C. Smith, T. C. Carusone and V. Gaudet, Microelectronic circuits , Oxford, 8th ed., 2020. [2] CD4007 chip data sheet: http://www.ti.com/lit/ds/symlink/cd4007ub.pdf 12

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