2019 Test 1

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The University of Western Australia *

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3015

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Electrical Engineering

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Oct 30, 2023

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Page | 1 UWA – ENSC3015 Signals and Systems Please complete your details below: Surname : _________________________________ Number: ______________________ Signature: ________________________________ Date: ____________________ 8:58am, Wednesday, August 28, 2019 in ENCM LT1 Class Test 1: Introduction and Time-Domain Analysis Time allowed: 45 minutes Max mark: 30, Assessment: 5% 1 This paper contains: 7+1 pages, 4 questions Candidates should attempt all questions and show all working with numerical answers to 3 decimal places in the spaces provided after each question, show as much working as possible to gain maximum marks. You can use the blank page on the reverse side for rough working, but these pages will not be marked FOR THE ATTACHMENTS PLEASE REFER TO THE PAGES AT THE END / SEPARATE HANDOUT 1 If you do better in the exam this test will not contribute to your unit marks and the 5% will come from the final exam performance. However if you do better in this test compared to the final exam then this test will be included in the unit marks. /30
Page | 2 Question 1 (7 marks) (a) A discrete-time signal 𝑥𝑥 [ 𝑛𝑛 ] is shown below: Sketch and label each of the following signals: (i) 𝑥𝑥 [2 𝑛𝑛 ] (ii) 𝑥𝑥 [ −𝑛𝑛 + 2] (i) (ii)
Page | 3 (b) Two discrete-time signals, 𝑥𝑥 1 [ 𝑛𝑛 ] and 𝑥𝑥 2 [ 𝑛𝑛 ] , are shown below: Sketch and label each of the following signals: (i) 𝑦𝑦 2 [ 𝑛𝑛 ] = 2 𝑥𝑥 1 [ 𝑛𝑛 ] (ii) 𝑦𝑦 3 [ 𝑛𝑛 ] = 𝑥𝑥 1 [ 𝑛𝑛 ] 𝑥𝑥 2 [ 𝑛𝑛 ] (i) (ii)
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Page | 4 (c) Consider the system shown below Determine whether it is (i) memoryless; (ii) causal; (iii) linear; (iv) time-invariant; or (v) stable.
Page | 5 Question 2 (8 marks) Consider the signal: 𝑥𝑥 ( 𝑡𝑡 ) = 1 0 < 𝑡𝑡 ≤ 3 0 𝑜𝑜𝑡𝑡ℎ𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒 Derive the expression for the convolution of 𝑥𝑥 ( 𝑡𝑡 ) with itself, that is 𝑥𝑥 ( 𝑡𝑡 ) ∗ 𝑥𝑥 ( 𝑡𝑡 ) = 𝑥𝑥 ( 𝜏𝜏 ) 𝑥𝑥 ( 𝑡𝑡 − 𝜏𝜏 ) 𝑑𝑑𝜏𝜏 −∞ .
Page | 6 Question 3 (8 marks) An RLC circuit has the following system differential equation for the voltage output, 𝑦𝑦 ( 𝑡𝑡 ) , in terms of the current input, 𝑥𝑥 ( 𝑡𝑡 ) : 𝑑𝑑 2 𝑑𝑑𝑡𝑡 2 𝑦𝑦 ( 𝑡𝑡 ) + 3 𝑑𝑑 𝑑𝑑𝑡𝑡 𝑦𝑦 ( 𝑡𝑡 ) + 9 4 𝑦𝑦 ( 𝑡𝑡 ) = 6 𝑥𝑥 ( 𝑡𝑡 ) The system state at 𝑡𝑡 = 0 can be shown to be: 𝑦𝑦 (0 ) = 1, 𝑦𝑦̇ (0 ) = 1 (a) If zero current is fed into the circuit ( 𝑥𝑥 ( 𝑡𝑡 ) = 0 ) what is the voltage response 𝑦𝑦 ( 𝑡𝑡 ) ? (b) What happens to the output voltage from 𝑡𝑡 = 0 to 𝑡𝑡 = 1 ?
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Page | 7 Question 4 (7 marks) Consider the discrete-time LTI system with difference equation: 𝑦𝑦 [ 𝑛𝑛 ] 1 4 𝑦𝑦 [ 𝑛𝑛 − 1] = 3 𝑥𝑥 [ 𝑛𝑛 ] By applying the unit impulse to the system ( 𝑥𝑥 [ 𝑛𝑛 ] = 𝛿𝛿 [ 𝑛𝑛 ] ) the resulting output sequence can be modelled as: 𝑦𝑦 𝛿𝛿 [ 𝑛𝑛 ] = 3 1 4 𝑛𝑛 𝑢𝑢 [ 𝑛𝑛 ] What is the expression for 𝑦𝑦 [ 𝑛𝑛 ] for the input: 𝑥𝑥 [ 𝑛𝑛 ] = 1 3 𝑛𝑛 𝑢𝑢 [ 𝑛𝑛 ] ? Assume the flip-flop memory delay units have been cleared.

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