HW 10 Solutions

For the counter shown below,the sequence of counting for this counter is (in decimal): CLK PL U/D Operation Q3 Q2 QI Q0 PL D3 D2 DI DO Load UID Counts up Counts down clk 0 1 1 1 Select one: 1 2 3→4→1→2...etc O11 10 9→8→7→11.....etc 7 8 9 10→11→12→7→8.....etc 12 11 10-9→8→7→12.....etc O7 8→9→10→11→7, 8, ....etc 3 2 1 0→3.....etc 0 1 2 3→0→1...etc 3-2 1+3...etc 4 3→ 2→1→4→3.....etc Answer is not listed X个不

[Digital logic circuit] It's a question Calculate 1) Path Delay, 2) Critical Path Delay, and 3) Circuit Delay in the following circuits ( NEED NEAT HANDWRITTEN SOLUTION ONLY OTHERWISE DOWNVOTE)

Q1) Choose the correct answer: Solve all please I. The circuits can be divided into two broad categories analog and digital are called: a-control circuits b- logic circuits c- electronic circuits d- design circuits II. Magnitude comparison is performed by a logic circuit called a: a- divider b- multiplexer c- decoder d- comparator The resolution of 5 bits ADC from analog signal (-4-4)V is: a- 0.2 b-0.22 c- 0.24 III. IV. V. d- 0.25 The full scale output from analog signal (-4-4)V by using 5 bits ADC is: a- 3.7 b-3.75 c-3.85 d-4 The number of quantization level of 10 bit ADC from analog signal (-5~5)V is: a- 128 b- 256 c- 32 d-1024

Problem 3: Please convert the Mealy FSM in Table 1 to a Moore machine by showing the Moore FSM table. Next State, Output Current State Input 0 1 A B,1 D,0 B C,0 B,0 C B,1 A,0 D B,0 C,0 Table 1

Implement the following logic function with an 8x1 MUX. Apply the variable A, C, and D to the selection lines. Also implement the same logic function using discrete logic gates. Compare the output waveforms. The two circuits should be created in the same schematic file using the same inputs. The two sets of outputs from the two circuits should be shown in the same waveform and simulated simultaneously. F (A, B, C, D) = (A+B+D’)(C+A)(B+D)

please show me all steps.  I am having alot of trouble drawing the circuit

1.2 Convert to octal. Convert to hexadecimal. Then convert both of your answers to decimal, and verify that they are the same. 111010110001.011, (b) 10110011101.112