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Sohag University *

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Electrical Engineering

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Nov 24, 2024

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Page 1 of 2 Electrical Engineering Dept. 4 th Comm. & 3 rd Power Sections Computer Interfacing Sheet 04 1) For the I2C protocol, show how a master says that it wants to write to a slave with address 1001101. 2) For the I2C protocol, what is the function of start and stop. 3) For the I2C protocol, show how a master says that it wants to write to a slave with address 1001101. 4) For the I2C protocol, write the steps of byte burst read and write. Also, for Multibyte burst read and write. 5) How the I2C protocol support bus arbitration? 6) True or false. I2C protocol is ideal for short distances. 7) How many bits are there in a frame? Which bit is for acknowledge? 8) True or false. START and STOP conditions are generated when the SDA is high. 9) True or false. After the arbitration of two masters, both must start transmission from the beginning. 10) The letters ISA are an acronym for what phrase? 11) The ISA bus system supports what size data transfers? 12) Is the ISA bus interface often used for memory expansion? 13) Given a 74LS244 buffer and a 74LS374 latch, develop an ISA bus interface that contains an 8-bit input port at I/O address 308H and an 8-bit output port at I/O address 30AH. 14) The ISA bus can transfer data that are ____________ wide at the rate of 8 MHz. 15) Describe how the address can be captured from the PCI bus. 16) What is the purpose of the configuration memory found on the PCI bus interface? 17) Define the term plug-and-play. 18) What is the purpose of the connection on the PCI bus system? 19) What advantage does the PCI bus exhibit over the ISA bus? 20) How fast does the PCI Express bus transfer serial data? 21) Most computers contain at least one serial communication port. What is this port called? 22) Can a USB device appear as a COM device? 23) What data rates are available for use on the USB? 24) How are data encoded on the USB? 25) What is the maximum cable length for use with the USB? 26) Will the USB ever replace the ISA bus? 27) How many device addresses are available on the USB? 28) What is NRZI encoding? 29) What is a stuffed bit? 30) If the following raw data are sent on the USB, draw the waveform of the signal found on the USB: (1100110000110011011010).

Page 2 of 2 31) How long can a data packet be on the USB? 32) What is the purpose of the NAK and ACK tokens on the USB? 33) Describe the difference in data transfer rates on the PCI bus when compared with the AGP. 34) What is the transfer rate in a system using an 8X AGP video card? 35) What is the transfer rate of a PCI Express 16X video card? 36) Bit stiffing is used in NRZI encoding when A) long series of zeros are transmitted B) short series of zeros are transmitted C) no data is transmitted for a long time D) None of the above 37) SPI and I 2 C are A) specialized protocols of parallel interfacing B) encoding techniques C) analog to digital converting modules D) None of the above 38) CRC is A) a shake-handing signal B) an error detecting method C) a sending and receiving technique D) an interrupt handler method 39) The ______responsible of issue error messages for an I/O peripheral A) CPU B) I/O controller C) I/O bus D) CPU and the I/O controller 40) The ISA bus is _________ than the PCI bus. A) slower B) faster C) wider D) easier in installation 41) The PCI and ISA BUS are used as A) extension for the memory BUS B) replacement of the I/O peripherals C) extension for the processor BUS D) all of the above 42) When the USB is connected to a system, its root hub is connected to the ________ A) PCI bus B) ISA bus C) CPU bus D) Any of the mentioned 43) ______ gives the PCI its plug and plays capability. A) Configuration address space B) Multiple I/O types C) Bus width D) PCI interface 44) ______making the PCI bus independent of processor type and architecture A) PCI switch B) PCI memory C) PCI Bridge D) PCI interface 45) Command to PCI peripheral appears on the ____ pins A) Frame B) C/BE C) address D) data 46) ________ is an extension of the processor BUS A) USB B) PCI bus C) bridge D) none of the above 47) The bus parameters may include A) bus width B) transfer width C) synchronization type D) all of the above 48) I/O and Peripheral busses (such as PCI, ISA, USB, … etc) are A) Longer, slower, & narrower B) Short, fast, & wide C) fixed topology, designed as a “chipset” D) connected directly to the CPU 49) AGP is connected to the CPU bus A) through the south bridge B) through a bridge C) directly D) PCI 50) The bus used to connect the monitor to the CPU is ______ A) PCI bus B) AGP bus C) Memory bus D) CPU internal bus

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