ELEX_4420_-_Lab_08_-_Switch_Mode_Power_Supply_SMPS

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BCIT ELEX 4420 1 ELEX 4420 – Power Elec & Renew Energy App Lab 8: Switch Mode Power Supply Lab Report Marcel Moreno A01267227 April 1, 2024

BCIT ELEX 4420 2 Lab 8 – Switch Mode Power Supply Objective To build and test boost, buck-boost, and buck converters. Equipment IRF840 - Transistor (N-channel Power MOSFET) 1N5819 - Schottky Diode 1N5254B - Zener Diode 27 V 1/2W 2x1000 μ F polarized capacitors 0.1 Ω (±1%), 2W current sensing resistor 1 kΩ resistor 470 μ H, 3 A inductor (not in the kit, will be provided) Rheostat (not in the kit, will be provided)

BCIT ELEX 4420 3 A – Boost Converter [3 marks] When building your circuit, aim to keep the leads/paths conducting large currents as short as you reasonably can. Failure to do so will result in difficulties or large deviations in expected measurements as well as difficulty in making measurements for the remainder of the laboratory. To get rid of extra noise on the scope: • Please use the ACQUIRE AVERAGE option. • Also, on CH1 and CH2 turn the BW option ON. 1. Set the function generator to output a 0 V to 10 V (5 V DC offset) pulse with a frequency of 20 kHz and 50% duty cycle. Your load resistance (Rheostat) should be set to 50 Ω . 2. Set the DC power supply’s voltage to 5 V and its current limit to 1 A . 3. Connect the DMM to the output load to measure the DC voltage. 4. Build the circuit. Show it to the instructor. Include a picture of the circuit in your report. 1000μF 1 k 1000μF 5 V R L =50 470 μH D1 27V Zener Q1 V s (t) R s Function Generator + V gs - + V ds - 1N5819 IRF840 V CH2 CH1 0 10 0.1 i=v/R i in Note 1: This circuit includes a gradual overvoltage protection using a 27 V Zener diode. If the output voltage exceeds 27 V, it will begin to conduct and load down your boost converter. This prevents accidental overvoltage should you remove the load. Note 2: your variable resistor at the output is the power rheostat (which will be provided to you by your lab instructor). Note 3: Your current sampling resistor is used to measure the inductor current and is placed on the low potential side (return path) of your circuit so that you do not have to tie your scope common to a high potential. This reduces the risk of creating a short circuit through the scope probe common connectors (bad!). Note that the two sides of the sampling resistor should not be in the same breadboard rail.

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BCIT ELEX 4420 4 Transistor’s pin map is provided. Show your circuit to the lab instructor. Helpful wiring tip for this circuit: Sampling resistor will be placed between the two rails. 1. For three different loads (50 Ω, 150 Ω, and 250 Ω) , find the values asked in the table: R (Ω) V o (DC) DMM V o (AC) DMM ∆ V o Scope ∆ i L =∆V CH2 /0.1 Scope P in DC Supply P out = 𝑉 ? 2 /𝑅 𝜂 = 𝑃 ? 𝑃 𝑖? 50 7.96V 0.8mV 480mV 0.48A 1.579W 1.267W 0.80 150 8.68 0.4mV 320mV 0.40A 0.930 0.753W 0.81 250 10.14 0.3mV 300mV 0.28A 0.503 0.411W 0.82 2. The following pictures show how inductor current change as R increases (or as D decreases). The circuit transition from Continuous Conduction Mode (CCM) to Boundary Conduction Mode (BCM) and then Discontinuous Conduction Mode (DCM). For what value of R, the circuit transitions from CCM to DCM? For this resistance, inductor current starts from 0 A and ends at 0 A within one cycle. Note 1: To measure P in , read the DC source’s supply power: Note 2: To read the ∆ V o and ∆i L from the oscilloscope, use AC coupling to observe and capture the voltage ripples.

BCIT ELEX 4420 5 Question 1: 𝑉 𝐴?,?𝑚? 𝑉 ?? is a measure of noise level of a DC signal. For a high-quality DC signal this ratio should be very small (<5%). How is the quality of the output DC signal for each loading condition? Based on the results I got the quality of the output DC signal for each loading condition gets better. The noise level ratio of 250 Ω load is lower compared to the 50 Ω load. This This shows that the ripple at higher loading condition has better DC signal compared to the smaller load. Question 2: Comment on how ∆V o and ∆ i L changed with the load. Can you justify this behavior? The ∆ V o is the change in the output voltage of the power supply while the ∆ i L is the fluctuation of the inductor current. As you can see in my data the ∆ V o and ∆ i L change as the load increases, which proves that this characteristic is dependent to the load we have in our system. Question 3: How does efficiency of the converter change with the load? Why? Does this justify why V o value is closer to the ideal case for higher load resistance? The efficiency of the converter is dependent on the amount load as lower load needs more current which can impact the efficiency of the converter. That is why the V o value is closer to the ideal case for higher load resistance because it needs less current, that is why it is more efficient compared to lower load that needs higher amount of current at also based on my data it shows that higher load has higher efficiency. Question 4: What happens if we leave the output of a boost converter as open circuit? [DO NOT DO THAT!] The capacitor output voltage will continue to rise at dangerous levels causing the boost converter to be damaged and potentially causing arcing in the circuit because there is no load to absorb the voltage.

BCIT ELEX 4420 6 B – Buck-Boost Converter [3.5 marks] Change your circuit to a buck-boost converter: 1000μF 1 k 1000μF 5 V R L 470 μH D1 27V Zener + V ds - 1N5819 V CH2 CH1 i=v/R i in Q1 V s (t) R s Function Generator + V gs - IRF840 0 10 0.1 1. Set R to 200 Ω and change the duty cycle according to the table. Fill out the table. D (%) V o (DC) DMM V o (AC) DMM ∆ V o Scope ∆ i L =∆V CH2 /0.1 Scope P in DC Supply P out = 𝑉 ? 2 /𝑅 𝜂 = 𝑃 ? 𝑃 𝑖? 10 2.214V 0.3mV 480mV 0.48A 0.120W 0.0245 0.20 30 6.624 0.4mV 400mV 0.44A 0.314W 0.219 0.70 50 8.936 0.4mV 320mV 0.40A 0.486W 0.399 0.82 70 13.28 0.6mV 260mV 0.38A 1.240W 0.882 0.71 Question 1: How do V o (DC), V o (AC), and 𝑉 𝐴?,?𝑚? 𝑉 ?? change with the duty cycle? Do we have a better-quality DC signal at D = 30% or at D = 70%? As the duty cycle increases the DC output voltage and AC output voltage also increases. When duty cycle is at 70% the DC signal is way better compared to the 30% duty cycle as you can see in my data the efficiency of the 70% is better. Question 2: Comment on how ∆V o and ∆ i L changed with the duty cycle. Can you justify this behavior? As the duty cycle increases the energy absorbed by the load also increases because of this the ∆ V and ∆ i L decreases as the duty cycle increases. The reason for this is because the power absorbed at the output is higher at higher duty cycle. Question 3: Does the efficiency of the converter change significantly with the duty cycle? Yes, as you can see in my data the 30% duty cycle has the lowest efficiency compared to the higher duty cycle. The reason for this is because there is more current flowing at higher duty cycle hence lesser switching losses, which increase the efficiency of the circuit.

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BCIT ELEX 4420 7 C – Buck Converter [3.5 marks] Change your circuit to a buck converter: 1000μF 1 k 1000μF 5 V R L 27V Zener + V ds - V CH2 CH1 i in Q1 V s (t) R s Function Generator + V gs - IRF840 0 10 i=v/R 0.1 470 μH D1 1N5819 Set R to 200 Ω and duty cycle to 50% and change the switching frequency according to the table. Fill out the table. f (kHz) V o (DC) DMM V o (AC) DMM ∆ V o Scope ∆ i L =∆V CH2 /0.1 Scope P in DC Supply P out = 𝑉 ? 2 /𝑅 𝜂 = 𝑃 ? 𝑃 𝑖? 0.1 2.786 48.0mV 0.48mV 0.48A 0.120W 0.0388 0.32 1 6.634 5.6mV 0.62mV 0.70A 0.334W 0.220 0.66 20 8.618 1.4mV 0.140mV 0.88A 0.576W 0.371 0.64 100 8.902 0.4mV 0.342mV 0.94A 0.798W 0.396 0.50 250 9.289 0.4mV 0.682mV 0.148A 0.980W 0.431 0.44 Question 1: How do V o (DC), V o (AC), and 𝑉 𝐴?,?𝑚? 𝑉 ?? change with the switching frequency? The higher the switching frequency, the higher the voltage and current ripple in the circuit. Question 2: Comment on how ∆V o and ∆ i L changed with the switching frequency. Can you justify this behavior? As the switching frequency increases the ∆ V o and ∆ i L also increases. But it will be easier to filter with the use of capacitor and inductor. The only problem with this would be the switching losses would also be higher. Question 3: How does the efficiency of the converter change with the switching frequency? Why? When the frequency is lower the efficiency is not bad since the harmonics would be higher but when the frequency is very high it also decreases the efficiency since the switching losses would be high. Based on my data 1kHz up to 20kHz would be the ideal for this circuit but on the datasheet the best would be at 46kHz. Question 4: Based on question 2 and 3, is increasing switching frequency good or bad for a switch-mode power supply? Or is it both good and bad?! Higher switching frequency would be better because it means you would use smaller inductor and capacitor which saves you from spending mor, the downside of this is the switching losses will be high.

BCIT ELEX 4420 8 Question 5: Find the maximum switching frequency acceptable by the transistor we used in the circuit. (Google the datasheet) The maximum switching frequency for the transistor is 46kHz. Which means higher than this would be not efficient since it will exceed the operational limits but smaller than is better since on my data up to 20kHz the efficiency is up to 64% which better compared to higher frequency. Note: The method that we are using for measuring efficiency is very approximate. A slightly more accurate method is to keep the output voltage constant by adjusting the duty cycle for each case. The following graph shows the typical efficiency vs. switching frequency changes for a switch-mode power supply. Bonus [2 marks] Simulate the boost, buck-boost, and buck converter using the following links: https://www.mathworks.com/help/sps/ug/boost-converter.html https://www.mathworks.com/help/sps/ug/buck-boost-converter.html https://www.mathworks.com/help/sps/ug/buck-converter.html Change the parameters according to the experimental part of the lab. Coose ESR of capacitor and inductor as 5 and 25 Ohm, respectively. Add current or voltage sensors as needed. For each circuit, fill out the corresponding table when the circuit reaches steady state . Provide a snapshot of the results for each circuit. Compare your simulation and experimental results. Boost: R (Ω) V o (DC) ∆ V o ∆ i L 50 150 250 Buck-boost: D (%) V o (DC) ∆ V o ∆ i L 10 30 50 70 Buck: