Homework8_Solution (1)

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ECE 446/579:04 (Spring 2023) Homework #8 Solution 1. (Hardware Reverse Engineering) In Lecture 7 we discussed a CCS 2014 paper on Hardware Reverse Engineering: “M. Kammerstetter, M. Muellner, D. Burian, C. Platzer, and W. Kastner, Breaking Integrated Circuit Device Security through Test Mode Silicon Reverse Engineering, ACM Conference on Computer and Communications Security (CCS), pp. 549-557, 2014”. Please answer the following questions about this paper: a. In your opinion, is this attack a hack attack, shack attack, or lab attack (Please refer to the meanings of these three terms from our Lecture 4). b. Can you please discuss what this attack has achieved (e.g., breaking confidentiality, integrity, or something else of the system), as well as how the paper evaluated the effectiveness of the attack? c. What are the countermeasures that can potentially prevent this attack, as discussed in this paper or in Lecture 8? a. Lab attack. b. Breaking confidentiality of the system (i.e., the authentication algorithm, which is supposed to be a secret). The paper evaluated the effectiveness of the attack by executing the duplicated version of the authentication algorithm on an FPGA to replace the original one on the cartridge. If the game works normally, it indicates that the duplicated authentication algorithm is functional and thus the success of reverse engineering. c. Crypto signing test mode commands, only allowing on-chip execution, etc. (discussed in Section 5.3 of the paper), plus the hardware obfuscation techniques (discussed in part of Lecture 8). 2. (IC Piracy and Logic Locking) Based on your understanding about this lecture, please describe what is the IC piracy problem and why logic locking can be a solution to that problem. IC piracy is a breach of the IC intellectual property by producing unauthorized copies of the chip. Logic locking can typically lock an IC, which can be unlocked only if the correct key is provided. This way the stakeholders can manage the distribution of the keys to ensure that only authorized ICs can be unlocked and used. In other words, the pirated chips will become useless with the lack of the keys, even if their design is identical to the legitimate chip. 3. (Logic Locking Method) We discussed a circuit obfuscation mechanism presented in a DATE 2008 paper: “J. A. Roy, F. Koushanfar, I. L. Markov, EPIC: Ending Piracy of Integrated Circuits, Design, Automation and Test in Europe (DATE), pp. 1069-1074, 2008”. There is one important step named “combinational locking” in this work. Please describe what is combinational locking and how it works using a small example. Combinational locking is to modify the combinational circuit by XORing some selected wires with the common key. An example can be found in Figure 2 of the following paper, which we discussed in Lecture 8: Pramod Subramanyan, Sayak Ray, and Sharad Malik. "Evaluating the security of logic encryption algorithms." IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 137-143. 2015. 4. (Attacks on Logic Locking) We discussed at least 4 potential attacks on logic locking, such as brute-force attack, fault analysis attack, simple SAT attack, SAT attack, and bypass attack. Based on your understanding, please discuss whether each attack would be effective/ineffective in compromising logic locking under what scenarios.
(1) Brute-force attack can compromise logic locking only if sufficient computation resources are available to conduct 2 M+L + 2 M operations in a reasonable amount of time, where L is the number of bits in the common key, and M is the number of inputs for the target IC. This is typically considered as impossible given large L and M values. (2) Fault analysis attack can compromise logic locking in some scenarios (e.g., Figure 2(b)(c) in the HOST 2015 paper) but no in some other scenarios (e.g., Figure 2(d) in the HOST 2015 paper). (3) Simple SAT attack could resolve a key that works only for the small number of observed input/output samples, and the key may not be correct for an arbitrary input. Therefore, it is not considered as an effective approach to compromise logic locking. (4) The SAT attack presented in the HOST 2015 can effectively compromise most of the logic locking designs effectively, with the exceptions of some more recent SAT-resistant logic locking mechanisms (e.g., SARLock, as referenced below). M. Yasin, B. Mazumdar, J. J. V. Rajendran, and O. Sinanoglu. “SARlock: Sat attack resistant logic locking.” IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pages 236–241, May 2016. (5) The bypass attack targets specifically on defeating the SAT-resistant logic locking mechanisms (e.g., SARLock), by correcting the slightly incorrect outputs when wrong keys are applied. There is a tradeoff between bypass and SAT attacks in terms of their effectiveness in compromising logic locking. The combination of the two would enable very effective attacks on most logic locking mechanisms (at least at the time when the bypass attack paper is published – 2017). Xiaolin Xu, Bicky Shakya, Mark M. Tehranipoor, and Domenic Forte. "Novel bypass attack and BDD-based tradeoff analysis against all known logic locking attacks." International conference on cryptographic hardware and embedded systems (CHES), pp. 189-210, 2017. 5. (Defenses on Logic Locking) Can you provide an example of SAT-resistant logic locking mechanism? How does it work, and do you think it could be subject to any other attacks? The SARLock approach (referenced below), which employs a small comparator circuit that flips the circuit output for only one input pattern for a given (wrong) key. In this way, it ensures that at most one incorrect key value is ruled out by each Distinguishing input pattern (DIP) adopted in the SAT attack. M. Yasin, B. Mazumdar, J. J. V. Rajendran, and O. Sinanoglu. “SARlock: Sat attack resistant logic locking.” IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pages 236–241, May 2016. SARLock can be compromised by the bypass attack (referenced below), which corrects the slightly incorrect outputs when wrong keys are applied. Xiaolin Xu, Bicky Shakya, Mark M. Tehranipoor, and Domenic Forte. "Novel bypass attack and BDD-based tradeoff analysis against all known logic locking attacks." International conference on cryptographic hardware and embedded systems (CHES), pp. 189-210, 2017.
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