
ANALYSIS+DESIGN OF LINEAR CIRCUITS(LL)
8th Edition
ISBN: 9781119235385
Author: Thomas
Publisher: WILEY
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Q4: Write VHDL code to implement the finite-state machine described by the state
Diagram in Fig. 1.
Fig. 1
1. Consider the following feedback system.
Bode plot of G(s) is shown below.
Phase (deg)
Magnitude (dB)
-50
-100
-150
-200
0
-90
-180
-270
101
System: sys
Frequency (rad/s): 0.117
Magnitude (dB): -74
10°
K
G(s)
Bode Diagram
System: sys
Frequency (rad/s): 36.8
Magnitude (dB): -99.7
System: sys
Frequency (rad/s): 20
Magnitude (dB): -89.9
System: sys
Frequency (rad/s): 20
Phase (deg): -143
System: sys
Frequency (rad/s): 36.8
Phase (deg): -180
101
Frequency (rad/s)
a) Determine the range of K for which the closed-loop system is stable.
102
10³
b) If we want the gain margin to be exactly 50 dB, what is value for K we should
choose?
c) If we want the phase margin to be exactly 37°, what is value of K we should choose?
What will be the corresponding rise time (T) for step-input?
d) If we want steady-state error of step input to be 0.6, what is value of K we should
choose?
: Write VHDL code to implement the finite-state machine/described by the state
Diagram in Fig. 4.
X=1
X=0
solo
X=1
X=0
$1/1
X=0
X=1
X=1
52/2
$3/3
X=1
Fig. 4
X=1
X=1
56/6
$5/5
X=1
54/4
X=0
X-O
X=O
5=0
57/7
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