Exam 3

Design a security system for a smart home that includes a door and a window sensor. The system should trigger an alarm when a door or the window is opened while the security system is active. Your task is to design an ASIC based system that efficiently monitors the state of the door and window sensors and activates the alarm when necessary. You should consider inputs for the security system state (activated, deactivated) and the open/closed state of each sensor for door and window, and the output for the alarm activation. a) Provide gate level implementation with minimum possible number of gates. Use standard minimization techniques used in digital design to reduce the gates count. b) Develop the most efficient SCMOS transistor switch level schematic for the minimized logic obtained from part A. c) Develop the most efficient stick diagram for the layout in part B, and estimate the area in micron square d) Develop Standard cell layout and find the density of the logic e) Produce routing…

Create an Arduino program with the following condition. Print the states of the potentiometer and LED in the Serial monitor. A. Turns LED 1 on and LED 2 off when the pot is rotated between 25% and 50% B. Turns LED 1 off and LED 2 on when the pot is rotated between 50% and 75% C. Flashes LED 1 at 5Hz and turns, LED 2 off when the pot is rotated less than 25% D. Turns LED 1 off and flashes LED 2 at 5Hz when the pot is rotated more than 75%

Please Answer both the parts as they are part of same question and give proper explanation

use Timer to generate the delay time

(a) Construct a transition table and state graph for the circuit shown in Figure 2. (b) Construct a timing chart for the circuit for an input sequence X Indicate false outputs, if any. (Assume that initially Q1 = Q2 = 0 and that X changes midway between the rising and falling clock edges.) 10101. (c) List the output values produced by the input sequence. X Ji Q1 CLK K1 J2 Q2 K2 Q2 Figure 2

1. A synchronous finite state machine contains a single 'Serial Data' input (SD) and two outputs (S and 7). Output S should be active for one clock pulse every time the input sequence 11010 is detected and output T should be active every time the input sequence 11001 is detected. The functionality of this machine may be partially represented by a timing diagram as shown in Figure 1. Clock a) SD S T Figure 1: Synchronous finite state machine timing diagram Derive the Moore model state diagram for this machine. Hint: ensure that the machine operates correctly even if the bit pattern is preceded by sub-sections of the pattern. [5]

(a) Construct a transition table and state graph for the circuit shown in Figure 3. (b) Construct a timing chart for the input sequence X outputs, if any. (Assume that initially Q1Q2 between the rising and falling clock edges.) 01101. Indicate false = 01 and that X changes midway (c) List the output values produced by the input sequence. J Q1 CLK K Q2 Q2 Figure 3

Solve correct please

What are the main parameters necessary for ordering a commercial IC?

Q 7 Full explainthe  this question very fast solution sent me step by step Don't ignore any part all part work u  Not:- Text typing work only not allow paper work

Please could you complete this electronics question about Circuis Analysis. Thanks.

Using 8085 assembly language programming Design an emergency system for the case of a stranded plane,boat, bikers that will generate the flashing message “HELP” on the address field of the SDK-85. 10 seconds on , 10 seconds off with a total delay time of 200 seconds (10 times on/off ”HELP”) The system is activated by pressing the IV key A.) draw a flow chart based on the situation B.) indicate delay calculation (10 seconds) (value of DE) C. Convert the flow chart into assembly mnemonic (indicate RAM locations) D. Convert the mnemonics into assembly codes.